SI5XX-PROG-EVB【PDF 1/32 页】KIT EVALUATION FOR SI5XX

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Sheet目录1243

[1页]2页 3页 4页 5页

Si 5 7 0 / S i 5 71

10 MH Z TO 1.4 G H Z I 2 C P ROGRAMMABLE XO/VCXO

Features

Any programmable output

frequencies from 10 to 945 MHz and

select frequencies to 1.4 GHz

I 2 C serial interface

3rd generation DSPLL ? with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available LVPECL, CMOS,

LVDS, and CML outputs

Industry-standard 5x7 mm

package

Pb-free/RoHS-compliant

1.8, 2.5, or 3.3 V supply

Si5602

Applications

Ordering Information:

SONET/SDH

xDSL

10 GbE LAN/WAN

Low-jitter clock generation

Optical modules

Clock and data recovery

See page 27.

Description

The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL ?

circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are

Pin Assignments:

See page 26.

(Top View)

user-programmable to any output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz with <1 ppb resolution. The device is programmed

via an I 2 C serial interface. Unlike traditional XO/VCXOs where a different

crystal is required for each output frequency, the Si57x uses one fixed-

SDA

V DD

frequency crystal and a DSPLL clock synthesis IC to provide any-frequency

operation. This IC-based approach allows the crystal resonator to provide

CLK–

exceptional frequency stability and reliability. In addition, DSPLL clock

synthesis provides superior supply noise rejection, simplifying the task of

generating low-jitter clocks in noisy environments typically found in

communication systems.

GND

CLK+

Functional Block Diagram

SCL

Si570

V DD

CLK-

CLK+

SDA

Fixed

Frequency

10-1400 MHz

DSPLL Clock

V C

V DD

SDA

Synthesis

SCL

CLK–

Si571 only

ADC

GND

CLK+

SCL

Rev. 1.4 4/13

V C

GND

Si571

Si570/Si571

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